About me

I am an Associate Professor of Computer Science at National University of Defense Technology. I received my Ph.D. degree from National University of Defense Technology in 2013. I was a Postdoc Researcher at ETH Zurich from Nov. 2016 to Nov. 2017, working with Professor Onur Mutlu.

My research interests

My research is in computer architecture, machine learning and security. My work spans and stretches the boundaries of computer architecture. My research tackles many issues in high performance, energy efficiency, hardware security computer architecture design. I am especially excited about novel, fundamentally-efficient computation, and memory/storage paradigms, applied to emerging machine learning applications.

News and events

Paper accepted by MICRO’18: Reducing DRAM Accessing Latency via Charge-Level-Aware Look-ahead Partial Restoration.

Selected publications

Yaohua Wang, Arash Tavakkol, Lois Orosa, Saugata Ghose, Nika Mansouri Ghiasi, Minesh Patel, Jeremie S. Kim, Hasan Hassan, Mohammad Sadrosadati, and Onur Mutlu, "Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration" Proceedings of the 51st International Symposium on Microarchitecture (MICRO), Fukuoka, Japan, October 2018.

Arash Tavakkol, Mohammad Sadrosadati, Saugata Ghose, Jeremie Kim, Yixin Luo, Yaohua Wang, Nika Mansouri Ghiasi, Lois Orosa, Juan G. Luna and Onur Mutlu, "FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives" Proceedings of the 45th International Symposium on Computer Architecture (ISCA), Los Angeles, CA, USA, June 2018.

Jian Zhang, Shuming Chen, Yaohua Wang, "Advancing CMOS-type Ising Arithmetic Unit into the Domain of Real-world Applications" IEEE Transactions on Computers (TOC), Vol.67, Issue 5, 2018.

Yaohua Wang, Dong Wang, Shuming Chen, Zonglin Liu, Shenggang Chen, Xiaowen Chen, Xu Zhou, "Iteration Interleaving--Based SIMD Lane Partition" ACM Transactions on Architecture and Code Optimization (TACO), Vol. 12, January 2016. Presented at the 11th HiPEAC Conference, Prague, Czech Republic, January 2016.

Shuming Chen, Yaohua Wang, Sheng Liu, Jianghua Wan, Haiyan Chen, Hengzhu Liu, Kai Zhang, Xiangyuan Liu, Xi Ning, "FT-Matrix: A coordination-aware architecture for signal processing" (IEEE Micro), Vol.34, Issue 6, November 2014.

Yaohua Wang, Shuming Chen, Jianghua Wan, Jiayuan Meng, Kai Zhang, Wei Liu, Xi Ning, "A multiple SIMD, multiple data (MSMD) architecture: Parallel execution of dynamic and static SIMD fragments" Proceedings of the 19th International Symposium on High Performance Computer Architecture (HPCA), Shengzhen, China, February 2013.

Yaohua Wang, Shuming Chen, Kai Zhang, Jianghua Wan, Xiaowen Chen, Hu Chen, Haibo Wang, "Instruction shuffle: Achieving mimd-like performance on simd architectures" IEEE Computer Architecture Letters (CAL), Vol.11, Issue 2, 2012. (Best paper award, invited to present at the 19th HPCA conference).